Keysight Technologies Introduces PCIe® Gen3 Protocol Analysis Test Solution

Keysight Technologies Introduces PCIe® Gen3 Protocol Analysis Test Solution


Keysight Technologies, Inc. introduced the U4301B PCIe® protocol analyzer for engineers developing PCIe Gen3 systems. The U4301B supports all PCIe speeds from 2.5 GT/s (Gen1) through 8 GT/s (Gen3) and link widths from x1 through x16. The analyzer comes standard with analysis tools to validate PCIe LTSSM (link training and status state machine) processes, as well as NVM (non-volatile memory) Express and AHCI (advanced host controller interface) transactional protocol operations. New interposers support the latest storage devices that use SFF-8639 and M.2 connectors.

The U4301B PCIe analysis module works in an AXIe chassis to deliver the price and flexibility engineers need in today's test solutions. To help engineers connect to the system under test, Keysight has added two new interposer probes, the U4330A SFF-8639 and the U4328A M.2 PCIe interposers. In addition, Keysight has interposers available for more traditional connections: the U4321A solid slot interposer and the U4322A PCIe Gen3 midbus, probe. Customized probing is available with the U4324A flying-lead probe. Keysight probing solutions reliably capture data in marginal systems with the use of patented Equalization Snoop Probe (ESP) technology and fully automated tuning procedures.

LTSSM is often one of the most difficult challenges for product developers. The U4301B offers detailed analysis of the training sequence with LTSSM analysis and equalization visualization tools. Analyzing PCIe Gen3 equalization requires the capture of thousands of packets, and these tools provide a clear and easy-to-follow analysis summary of the capture process.

Storage technologies are moving quickly to adopt PCIe connections to provide higher throughput and improved response time supported by nonvolatile memory. NVM Express is a new protocol specifically designed for this environment. The U4301B organizes the transactions by direction or by queue to follow the data flow across the interface. Individual PRP (physical region page) lists contain all of the key information of the NVMe queues, and with one-click visualization of NVMe transactions, the U4301B allows designers to quickly review and validate the data flows over the PCIe connections.

"With storage moving to non-volatile memory and the high-performance PCIe interface, developers need new ways to test and optimize their products," said Dave Cipriani, vice president and general manager of Keysight's Oscilloscope and Protocol Division. "The U4301B offers the new interfaces and analysis tools for NVMe and AHCI devices of the future."

Performance analyses include:

  • Real data throughput calculations, with response-time measurement of the PCIe data flow. This analysis allows designers to understand throughput performance, PCIe response times and other operational measurements that provide insight for optimizing device performance.
  • Detailed graphing of available header and data flow control credits to make it easy for engineers to visualize and analyze data flow and credit availability.

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