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TI introduces ultra-low-jitter clock generators to enable more reliable telecommunications infrastructure equipment

TI introduces ultra-low-jitter clock generators to enable more reliable telecommunications infrastructure equipment

10/06/2015

Texas Instruments (TI) (NASDAQ: TXN) introduced a new family of clock generators that provides ultra-low jitter of 100 femtoseconds (fs) and flexible, unique pin control options. Compared to conventional reference clock solutions, the new clock generators' jitter performance enables system designers to optimize system timing margins and bit error rate (BER) to reduce data transmission errors. This allows for more reliable communications, networking, server, computing, and high-performance industrial equipment. LMK033x8 clock generators also offer versatile features to reduce design cycle time by facilitating easy prototype design and evaluation. For more information, see www.ti.com/lmk033xx-pr.

Key features and benefits of LMK033x8 clock generators

  • Ultra-low jitter performance enables flexible jitter budgeting: Up to two high-performance PLLatinum™ fractional-N phase-locked loops (PLLs) with eight outputs enable ultra-low jitter performance of 100 fs root mean square (RMS) over multiple integration bandwidths (1 KHz-5 MHz and 12 KHz-20 MHz). Designers can take advantage of the ultra-low jitter to improve their system BER and increase the reliability of their telecommunications infrastructure equipment.
  • Flexible, simple configuration: A unique pin-mode control feature enables designers to easily select from 71 pre-programmed frequency startup plans compared to one-time programmable memory offered by competitors. Integrated electrically erasable programmable read-only memory (EEPROM) enables easy customization, while the I2C interface gives system designers complete control of device configuration.
  • Reduced design cycle time: Glitchless fine/coarse frequency margining enables designers to simplify the stress and compliance testing of their systems during design verification and process verification (DVT/PVT) of prototypes.
  • Immune to supply noise: Integrated low-dropout regulators (LDOs) provide immunity to power-supply noise without requiring complex filter designs.

Find more details on Texas Instruments web site.



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